报告题目: Thermal Management of Interconnects in Logic Semiconductors

报告摘要: The half-pitch size of the local-tier metal interconnects in logic semiconductors will be reduced to 10 nm in the forthcoming sub-2 nm technology node, as predicted by the International Roadmap for Devices and Systems. The Joule heat produced in the narrowing interconnects as a byproduct can cause a significant temperature rise, which will significantly degrade the performance and reliability of logic semiconductors due to the electromigration effect. Thermal boundary resistance (TBR) dictates the overall thermal resistance of the nanoscale interconnect film stacks, which should be decreased for the thermal management of the interconnects in logic semiconductors. We investigated the TBR between the interconnect wire and dielectric interlayer of logic semiconductors. Simulations by a three-dimensional electrothermal finite element method demonstrate that such a high TBR can cause a temperature increase of hundreds of degrees. Hard X-ray photoelectron spectroscopy of deeply buried layers and interfaces reveals that the TBR is dependent on the bonding strength of interfaces adjacent to the interlayer. This study provides a guideline for the thermal management of interconnects in logic semiconductors.

报告人简介： Tianzhuo Zhan is an Associate Professor in the Graduate School of Interdisciplinary New Science at Toyo University. He received his B.E. and M.E. in Mechanical Engineering fromBeihangUniversity. He received his Ph.D. in Material Science from Kyushu University. From 2012 to 2021 he worked at National Institute for Materials Science andWasedaUniversity. His research interests are nanoscale thermal transport, including thermal conductivity of thin films and thermal boundary resistance using experimental and simulation methods. Much of his work has been on the design and performance improvement of thermoelectric devices and thermal management of semiconductor devices.

主持联系人：肖立新(Tel: 62767290)

科学前沿报告会(600)